ENGR210.github.io

Welcome to ENGR 210 ( CSCI B441 )

Spring 2020

This course provides a strong foundation for modern digital system design using hardware description languages. We start with basics of digital electronics and learn how digital gates are used to build large digital systems. We will practice modern digital system design by using state of the art software tools and implementation of the digital systems on a programmable hardware platform. At the end of the course, students will be familiar with modern approach for designing digital systems, using hardware description languages along with an appropriate methodology.

Syllabus

Lecture Slides

Autograder (Only accessible within IU)

Piazza

Downloads

Canvas (Registered students only)

Projects

P0 - Vivado Tutorial

P1 - Logic Gates

P2 - Demultiplexer

P3 - Arithmetic Logic Unit

P4 - Countdown Timer

P5 - Elevator Control

P6 - UART

P7 - Postfix Calculator

Course Schedule

This is the tentative schedule for this semester.

Date Day Lecture Topic Project Topic
1/14 Tuesday Intro / Logic  
1/16 Thursday Vivado Tutorial Basic Logic Gates
1/21 Tuesday Verilog Basics  
1/23 Thursday Decoders/Encoders Decoder / Demux
1/28 Tuesday Mux/Demux  
1/30 Thursday Adders / ALUs ALU
2/04 Tuesday ALUs / Latches  
2/06 Thursday Latches / Flops Timer
2/11 Tuesday Sequential Logic  
2/13 Thursday Finite State Machines Timer
2/18 Tuesday Finite State Machines  
2/20 Thursday Finite State Machines Elevator Controller
2/27 Tuesday Serial Communication  
3/03 Tuesday Review Elevator Controller
3/05 Thursday Exam I  
3/10 Thursday Serial Communication Elevator Controller
3/12 Tuesday Serial Communication  
3/17 Thursday Spring Break UART
3/19 Tuesday Spring Break  
3/24 Thursday Memory
3/26 Tuesday Memory  
3/31 Thursday FPGAS UART
4/02 Tuesday Circuits  
4/07 Thursday CMOS I Calculator
4/09 Tuesday CMOS II  
4/14 Thursday CMOS III Calculator
4/16 Tuesday Multiplication  
4/21 Thursday Multiplication Calculator II
4/23 Tuesday Division  
4/28 Thursday CPU Calculator II
4/23 Tuesday CPU  
4/25 Thursday Review
4/30 Tuesday Final 9.30am - 11.45am